(Hong Kong)
Product Summary
The EP1S60F1508C7N FPGAs is based on a 1.5-V, 0.13-μm, all-layer copper SRAM process, with densities of up to 79,040 logic elements (LEs) and up to 7.5 Mbits of RAM. Stratix devices offer up to 22 digital signal processing (DSP) blocks with up to 176 (9-bit × 9-bit) embedded multipliers, optimized for DSP applications that enable efficient implementation of high-performance filters and multipliers. Stratix devices support various I/O standards and also offer a complete clock management solution with its hierarchical clock structure with up to 420-MHz performance and up to 12 phase-locked loops (PLLs).
Parametrics
Absolute maximum ratings: (1)Supply voltage, With respect to ground, VCCINT: –0.5 to 2.4V; (2)Supply voltage, With respect to ground, VCCIO: –0.5 to 4.6V; (3)DC input voltage, VI: –0.5 to 4.6V; (4)DC output current, per pin, IOUT: –25 to 40mA; (5)Storage temperature No bias, TSTG: –65 to 150℃; (6)Junction temperature BGA packages under bias, TJ: 135℃.
Features
Features: (1)10,570 to 79,040 LEs; (2)Up to 16 global clocks with 22 clocking resources per device region; (3)Support for numerous single-ended and differential I/O standards; (4)High-speed differential I/O support on up to 116 channels with up to 80 channels optimized for 840 megabits per second (Mbps); (5)Differential on-chip termination support for LVDS; (6)Support for 133-MHz PCI-X 1.0 in -5 speed-grade devices; (7)Support for 100-MHz PCI-X 1.0 in -6 and faster speed-grade devices; (8)Support for 66-MHz PCI-X 1.0 in -7 speed-grade devices; (9)Support for remote configuration updates.
Diagrams
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 EP1S60F1508C7N |
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IC STRATIX FPGA 60K LE 1508-FBGA |
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EP1S |
Other |
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Negotiable |
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EP1S10 |
Other |
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Negotiable |
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EP1S10F484C5 |
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IC STRATIX FPGA 10K LE 484-FBGA |
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EP1S10F484C5N |
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IC STRATIX FPGA 10K LE 484-FBGA |
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EP1S10F484C6 |
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IC STRATIX FPGA 10K LE 484-FBGA |
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EP1S10F484C6N |
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IC STRATIX FPGA 10K LE 484-FBGA |
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